1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing thereof, further detailedly relates to lateral double diffused (LD) MOS transistor technique as a high-voltage device utilized for IC for driving a liquid crystal and others.
2. Description of the Related Art
LD MOS transistor structure means structure that a new diffused region is formed by diffusing impurities different in a conductive type in a diffused region formed on the side of the surface of a semiconductor substrate and difference in diffusion in a lateral direction between these diffused regions is utilized for effective channel length and a device having the structure is a device suitable for reducing ON-state resistance because a short channel is formed.
FIG. 8 is a sectional view for explaining a conventional type LD MOS transistor and for an example, N-channel LD MOS transistor structure is shown. The description of P-channel LD MOS transistor structure is omitted, however, both structures are different only in a conductive type and it is well-known that they are the similar structure.
As shown in FIG. 8, a reference number 51 denotes one conductive type of, for example, P-type semiconductor substrate, 52 denotes an N-type well region, an LP layer 53 (composing a P-type body region) is formed in the N-type well region 52, an N-type diffused region 54 is formed in the LP layer 53 and an N-type diffused region 56 is formed in an LN layer 55 (composing a drift region) in the N-type well region 52. A local oxide film 57 and a gate electrode 59 via a gate insulating film 58 are formed on the surface of the substrate and a channel region 60 is formed in the superficial region of the LP layer 53 immediately under the gate electrode 59.
The N-type diffused region 54 functions as a source region and the N-type diffused region 56 functions as a drain region. Also, a reference number 61 denotes a P-type layer for applying electric potential to the LP layer 53 and 62 denotes a layer insulation film.
In the LD MOS transistor, the density of the surface of the LN layer 55 is increased by diffusing the LN layer 55 composing a drift region, current on the surface of the LN layer 55 readily flows and the withstand voltage can be increased.
However, as shown in FIG. 8, the end of the LP layer 53 to be a P-type body region of the LD MOS transistor is under the gate electrode 59 and a range in which the threshold voltage can be regulated exists under an active region.
Therefore, electrostatic focusing at the end of the LP layer 53 and the effect of an electric field from the gate electrode 59 are joined, local current focusing is caused and the driving ability is deteriorated.
Also, as high voltage is applied between the N-type diffused region 56 to be a drain region and the gate electrode 59, the gate insulating film 58 is required to be thickened for high withstand voltage and it prevents further miniaturization.
The invention is made to solve the problems and intends to provide a semiconductor device being able to be made fine and having a highly withstand voltage.
A semiconductor device according to the invention is provided with a gate electrode formed on a second conductive type of well region formed in a first conductive type of semiconductor substrate via a gate insulating film, a first conductive type of body region formed so that the body region is adjacent to the gate electrode, a second conductive type of source region and a channel region respectively formed in the first conductive type of body region, a second conductive type of drain region formed in a position apart from the first conductive type of body region and a second conductive type of drift region formed so that the drift region surrounds the drain region and is characterized in that as a first conductive type of impurity layer ranging to the first conductive type of body region is formed under the gate electrode, a depletion layer expands with a connection with the first conductive type of impurity layer in the center and a region under the gate electrode is completed depleted.
The semiconductor device according to the invention is also characterized in that the first conductive type of impurity layer is formed in the vicinity of an active region under the gate electrode.
Preferably, the first conductive type of impurity layer is extended from said first conductive type of body region to the direction of the drift region in a state of an impurity diffusion layer having a predetermined width of depth so as to surround the active region under the gate electrode.
More preferably, the first conductive type of impurity layer is extended from said first conductive type of body region for upper side to the direction of the drift region so as to approach for a surface direction of the substrate.
Preferably, the gate insulating film comprises a first insulating film and a second insulating film made of local oxidation film, having thicker than the first insulating film, said gate electrode is formed on the first insulating film and on the second insulating film so that an end of the first conductive type of impurity layer approach to a bottom of the second insulating film.
Preferably, the first conductive type of impurity layer is terminated beneath the gate electrode.
Preferably, the first conductive type of impurity layer is disposed in a depth so that a region surrounded by the first conductive type of body region and said second insulating film is depleted completely under the gate electrode.
More preferably the first conductive type of impurity layer is disposed in a depth of 1 xcexcm from the first insulating film.
Further, a method of manufacturing the semiconductor device is characterized in that the method includes the following processes, first, a second conductive type of well region is formed by implanting and diffusing impurities of a second conductive type into/in the first conductive type of semiconductor substrate, and a low density first conductive type of impurity layer and a low density second conductive type of impurity layer are formed at an interval by respectively implanting and diffusing impurities of a first conductive type and impurities of a second conductive type into/in the second conductive type of well region. Next, after a region on the substrate is selectively oxidized to form a local oxide film and a gate insulating film is formed in a region except the local oxide film, a middle density first conductive type of impurity layer ranging to the low density first conductive type of impurity layer is formed using resist films respectively having an opening on the local oxide film and on a gate electrode formation region as a mask. Next, a gate electrode is formed from the gate insulating film to the local oxide film and impurities of a second conductive type are implanted using resist films respectively having an opening on a source formation region formed in the low density first conductive type of impurity layer and on a drain formation region formed in the low density second conductive type of impurity layer as a mask to form high density source/drain regions.
The method of manufacturing the semiconductor device is also characterized in that in the process for forming the second conductive type of well region in the method of manufacturing the semiconductor device, plural types of second conductive type of impurities different in a diffusion coefficient are implanted and diffused.
Further, the method of manufacturing the semiconductor device is characterized in that in the process for forming the second conductive type of well region in the method of manufacturing the semiconductor device, after first impurities are implanted and diffused, second impurities are implanted and diffused.